Hardware implementation of virtual memory for FPGAs for use in database systems with heterogeneous hardware
In this thesis the use of virtual memory for FPGAs is investigated. An existing accelerator system is extended in different techniques (hardware design with VHDL, system programming in C) to reduce the management effort for the host server and to use the physical memory available on the FPGA accelerator card more efficiently.
- Supervisor: M.Sc. Anna Drewes
Hardware implementation of image processing algorithms
Existing image processing algorithms are to be adapted for a hardware implementation FPGA-based and interfaces for image input and output are to be provided. Required knowledge: C, high-level synthesis, image processing
- Supervisor: Dr.-Ing. Gerald Krell
Task Scheduling for Heterogeneous Hardware
In this thesis, you will be involved with task scheduling and parallelism on different levels (data/functional/cross-device). These problems are some of the challenges of heterogeneous database systems, where SQL queries are executed on different kinds of processors(CPU/GPU/FPGA). The following skills are required: Programming C/C++ or Python – Understanding of the underlying hardware – Mathematical Modeling and Optimization Algorithms.
- Supervisor: M.Sc. Imad Hajjar