The Chair of Hardware-related Computer Engineering (HTI) is concerned with the design of runtime-adaptive, performance- and energy-efficient heterogeneous system architectures. A holistic approach is pursued, which allows an optimal adaptation of hardware and software architecture as well as system management to the requirements of the application and the technological possibilities of the hardware platforms used. The research focuses on the development of dedicated hardware accelerators based on dynamically reconfigurable FPGAs, the exploitation of the technological possibilities of heterogeneous 3D chips, the optimization of 2D and 3D on-chip communication architectures (especially Network-on-Chip) as well as adaptive runtime management of heterogeneous system architectures. Of interest are application areas from the fields of embedded systems and computer architectures, whose contradictory requirements in terms of energy efficiency, flexibility, computing power and size cannot be realized with classical hardware and system solutions. The focus is on neural networks, database systems, real-time applications in medical technology and electronic image correction.
An overview of our recently published research work can be found here: