Lehrstuhl Hardware-nahe Technische Informatik

Lehrstuhlleiter

Lehrstuhlleiter/-in

Prof. Dr.-Ing. Thilo Pionteck

Institut für Informations- und Kommunikationstechnik (IIKT)
Lehrstuhl Hardware-nahe Technische Informatik
Universitätsplatz 2, 39106 Magdeburg, G03-301   vCard
Vita

Lebenslauf

Thilo Pionteck ist Professor am Institut Informations- und Kommunikationstechnik der Otto-von-Guericke Universität Magdeburg und leitet den Lehrstuhl für Hardware-nahe Technische Informatik. Nach seinem Studium der Elektrotechnik an der Technischen Universität Darmstadt und anschließender Promotion am Fachgebiet für Mikroelektronische Systeme der Technischen Universität Darmstadt wechselte Thilo Pionteck 2005 nach Lübeck. Dort leitete die Arbeitsgruppe Reconfigurable Computing und übernahm 2008 die Juniorprofessur für Integrierte Schaltungen und Systeme. Von 2012 bis 2014 übernahm er Vertretungsprofessuren an der Technischen Universität Dresden und der Technischen Universität Hamburg-Harburg. Im Jahr 2015 übernahm er die Professur für Organic Computing im Institut für Technische Informatik an der Universität zu Lübeck und war dort verantwortlich für den Forschungsbereich adaptive digitale Systeme bis zu seinem Ruf an die Otto-von-Guericke Universität im Jahr 2016.

Forschungsschwerpunkte

  • Dynamisch rekonfigurierbare Hardwarearchitekturen und Systeme
  • Network-on-Chip
  • Manycore Systeme
  • Hybride Systeme
  • Hardware/Software Co-Design

Lehre

  • Eingebettete Systeme (System-on-Chip)
  • Hardwarenahe Rechnerarchitektur
  • Informationstechnik II
  • Doktorandenkolloquium: Hardware-nahe Rechnerarchitektur
  • Electronic System Level Modeling

Aktivitäten

  • Publication Chair der International Conference on Architecture of Computing Systems ARCS 2016 in Nürnberg
  • Track Co-Chair der Reconfigurable Computing and FPGAs Conference ReConFig 2015 in Cancun, Mexico
  • Publication Chair der International Conference on Architecture of Computing Systems ARCS 2015 in Porto, Portugal
  • Publication Chair der International Conference on Architecture of Computing Systems ARCS 2014 in Lübeck
  • General Chair des Workshops Diagnostic Services in Network-on-Chips DSNoC 2011
  • Program Chair des Workshops Diagnostic Services in Network-on-Chips DSNoC 2010
  • Guest Editor for Elsevier Journal on Microprocessors and MicrosystemsProgram
  • Commitee Member folgender Konferenzen:
    • International Symposium on Applied Reconfigurable Computing (ARC)
    • International Conference on Architecture of Computing Systems (ARCS)
    • International Conference on Field Programmable Logic and Applications (FPL)
    • IEEE International Symposium on Network Computing and Applications (NCA)
    • International Conference on ReConFigurable Computing and FPGAs (ReConFig)
    • Southern Programmable Logic Conference (SPL)
    • Workshop on Virtual Prototyping and Embedded Systems (ViPES)
  • Handling Editor of the Euromicro/Elsevier journal of Microprocessors and Microsystems
  • Review activities for 15 international and national journals. Among others for:
    • ACM Transactions on Reconfigurable Technology and Systems
    • ACM Transactions on Embedded Computing Systems
    • IEEE Transaction on CAD of Integrated Circuits and Systems
    • Journal of Systems Architecture (Elsevier)
    • Journal of Microprocessors and Microsystems (Elsevier)
  • Review activity for Deutsche Forschungsgemeinschaft (DFG) and ACQUIN
  • Cooperation in the project “VHN-TIO” (joint project of North German universities – Computer Engineering Online), 2010 to 2012
  • Responsible for the setting up of a cooperation of University of Lübeck with Université des Montagnes in Bagangté, Cameroon, 2009 to 2012
  • Cooperation in the research focus “Self-Organizing Wireless Sensor and Data Networks” of Technische Universität Hamburg-Harburg, Germany, 2013 to 2014

Ausgewählte Publikationen

  • Stefan Werner, Dennis Heinrich, Sven Groppe, Christopher Blochwitz, Thilo Pionteck: Runtime Adaptive Hybrid Query Engine based on FPGAs. Open Journal of Databases (OJDB), 2016, Vol.3, (1), p.21-41
  • Raitza, M., Vogt, M., Hochberger, C. & Pionteck, T.: RAW 2014: Random Number Generators on FPGAs. ACM Trans. Reconfigurable Technol. Syst., vol. 9, no. 2, pp. 15:1-15:21, 2015. ISSN 1936-7406. doi:10.1145/2807699
  • Werner, S.; Heinrich, D.; Stelzner, M.; Linnemann, V.; Pionteck, T.; Groppe, S.: Accelerated Join Evaluation in Large Semantic Web Databases by using FPGAs.  Concurrency and Computation: Practice and Experience, 2015, DOI: 10.1002/cpe.3502
  • Joseph, J. M.; Blochwitz, C.; Garcia-Ortiz, A.; Pionteck, T.: Area and Power Savings via Buffer Reorganization in Asymmetric 3D-NoCs for Heterogeneous 3D-SoCs. IEEE Circuits and Systems Conference (NORCAS), 2015
  • Hampel, V.; Pionteck, T.; Maehle, E.: An Approach for Performance Estimation of Hybrid Systems with FPGAs and GPUs as Coprocessor. International Conference on Architecture of Computing Systems (ARCS), 2012
  • Albrecht, C.; Foag, J.; Koch, R.; Maehle, E.; Pionteck, T.: DynaCORE – Dynamically Reconfigurable Coprocessor for Network Processors. Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications, Springer, 2009, ISBN: 978-90-481-3484-7 
  • Pionteck, T.: Koch, R.; Albrecht, C.; Maehle, E.: A Design Technique for Adapting Number and Boundaries of Reconfigurable Modules at Runtime. International Journal of Reconfigurable Computing, vol. 2009, Article ID 942930, 2009, doi:10.1155/2009/942930
  • Pionteck, T.; Albrecht, C.; Koch, R.; Maehle, E,: Adaptive Communication Architectures for Runtime Reconfigurable System-on-Chips. Parallel Processing Letters, 275-289, World Scientific Publishing, 2008
  • Pionteck, T.; Stiefmeier, T.; Staake, T.; Glesner, M.: On the Design of A Dynamically Reconfigurable Function-Unit for Error Detection and Correction. VLSI-SOC: From Systems to Chips, Reis, R.; Osseiran, A.; Pfleiderer, H.J. (Eds.), Kluwer-Springer, 2007, ISBN: 978-0-387-73660-0
  • Pionteck, T.; Koch, R.; Albrecht, C.: Applying Partial Reconfiguration to Networks-on-Chips. 16th International Conference on Field Programmable Logic and Applications (FPL), 155-160, IEEE, Madrid, Spain 2006
Publikationen

2024

Buchbeitrag

Large filter low-level processing by edge TPU

Krell, Gerald; Pionteck, Thilo

In: Proceedings of the 19th International Joint Conference on Computer Vision, Imaging and Computer Graphics Theory and Applications. Volume 4 - Setubal : Scitepress Digital Library ; Radeva, Petia . - 2024, S. 464-473 [Konferenz: 19th International Joint Conference on Computer Vision, Imaging and Computer Graphics Theory and Applications, Rome,Italy, February 27-29, 2024]

2023

Buchbeitrag

A flexible and scalable reconfigurable FPGA overlay architecture for data-flow processing

Drewes, Anna; Burtsev, Vitalii; Gurumurthy, Balasubramanian; Wilhelm, Martin; Bronske, David; Saake, Gunter; Pionteck, Thilo

In: 31st IEEE International Symposium on Field-Programmable Custom Computing Machines , 2023 - Piscataway, NJ : IEEE ; Prasanna, Viktor, S. 212

Buchbeitrag

Modeling task mapping for data-intensive applications in heterogeneous systems

Wilhelm, Martin; Geppert, Hanna; Drewes, Anna; Pionteck, Thilo

In: Euro-Par 2022: Parallel Processing Workshops , 1st ed. 2023. - Cham : Springer Nature Switzerland ; Singer, Jeremy, S. 145-157 - (Lecture notes in computer science; volume 13835)

Buchbeitrag

ADAMANT - a query executor with plug-in interfaces for easy co-processor integration

Gurumurthy, Balasubramanian; Broneske, David; Durand, Gabriel Campero; Pionteck, Thilo; Saake, Gunter

In: 2023 IEEE 39th International Conference on Data Engineering workshops - Piscataway, NJ : IEEE, S. 1153-1166

Buchbeitrag

FPGA-integrated bag of little bootstraps accelerator for approximate database query processing

Burtsev, Vitalii; Wilhelm, Martin; Drewes, Anna; Gurumurthy, Balasubramanian; Broneske, David; Pionteck, Thilo; Saake, Gunter

In: Applied Reconfigurable Computing. Architectures, Tools, and Applications , 1st ed. 2023. - Cham : Springer Nature Switzerland ; Palumbo, Francesca, S. 115-130 - ( Lecture notes in computer science; volume 14251)

Begutachteter Zeitschriftenartikel

Enabling plug-and-play in cyber-physical systems using MPSoC-FPGAs

Passaretti, Daniele; Steiger, Max; Pionteck, Thilo

In: IEEE access / Institute of Electrical and Electronics Engineers - New York, NY : IEEE, Bd. 11 (2023), S. 116219-116234

Begutachteter Zeitschriftenartikel

A comprehensive modeling approach for the task mapping problem in heterogeneous systems with dataflow processing units

Wilhelm, Martin; Geppert, Hanna; Drewes, Anna; Pionteck, Thilo

In: Concurrency and computation - Chichester : Wiley, Bd. 35 (2023), Heft 25, Artikel e7909, insges. 24 S.

Begutachteter Zeitschriftenartikel

Hybrid CPU/GPU/APU accelerated query, insert, update and erase operations in hash tables with string keys

Groth, Tobias; Groppe, Sven; Pionteck, Thilo; Valdiek, Franz; Koppehel, Martin

In: Knowledge and information systems - London : Springer . - 2023, insges. 19 S.

Begutachteter Zeitschriftenartikel

Novel insights on atomic synchronization for sort-based group-by on GPUs

Gurumurthy, Bala; Broneske, David; Schäler, Martin; Pionteck, Thilo; Saake, Gunter

In: Distributed and parallel databases - New York, NY [u.a.] : Consultants Bureau . - 2023, insges. 23 S.

Herausgeberschaft

Architecture of Computing Systems - 36th International Conference, ARCS 2023, Athens, Greece, June 13–15, 2023, Proceedings

Goumas, Georgios; Tomforde, Sven; Brehm, Jürgen; Wildermann, Stefan; Pionteck, Thilo

In: Cham: Imprint: Springer, 2023., 1 Online-Ressource(XIX, 328 p. 125 illus., 91 illus. in color.) - (Lecture Notes in Computer Science; 13949), ISBN: 978-3-031-42785-5

2022

Buchbeitrag

Accelerated parallel hybrid GPU/CPU hash table queries with string keys

Groth, Tobias; Groppe, Sven; Pionteck, Thilo; Valdiek, Franz; Koppehel, Martin

In: Konferenz: 33rd International Conference on Database and Expert Systems Applications, DEXA 2022, Vienna, Austria, August 22-24, 2022, Database and Expert Systems Applications - Cham: Springer International Publishing; Strauss, Christine . - 2022, S. 191-203 - (Lecture notes in computer science; volume 13427)

Buchbeitrag

Dead-ends in FPGAs for database acceleration

Drewes, Anna; Koppehel, Martin; Pionteck, Thilo

In: Konferenz: 21st International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS 2021, virtual event, July 4-8, 2021, Embedded Computer Systems: Architectures, Modeling, and Simulation - Cham: Springer International Publishing; Orailoglu, Alex . - 2022, S. 493-504 - (Lecture notes in computer science; volume 13227)

Buchbeitrag

Hardware isolation support for low-cost SoC-FPGAs

Passaretti, Daniele; Boehm, Felix; Wilhelm, Martin; Pionteck, Thilo

In: Konferenz: International Conference on Architecture of Computing Systems, ARCS 2022, Heilbronn, Germany, September 13-15, 2022, Architecture of computing systems - 35th International Conference, ARCS 2022, Heilbronn, Germany, September 13-15, 2022 : proceedings - Cham: Springer; Schulz, Martin . - 2022, S. 148-163 - (Lecture notes in computer science; volume 13642)

Begutachteter Zeitschriftenartikel

Hardware optimizations of the X-ray pre-processing for interventional computed tomography using the FPGA

Passaretti, Daniele; Ghosh, Mukesh; Abdurahman, Shiras; Egito, Micaela Lambru; Pionteck, Thilo

In: Applied Sciences - Basel: MDPI, Bd. 12 (2022), 11, insges. 24 S.

Herausgeberschaft

Architecture of computing systems - 35th International Conference, ARCS 2022, Heilbronn, Germany, September 13-15, 2022 : proceedings

Papadopoulou, Nikela; Pionteck, Thilo; Schulz, Martin; Trinitis, Carsten

In: Cham: Springer, 2022, 1 Online-Ressource - (Lecture notes in computer science; volume 13642), ISBN: 978-3-031-21867-5 Kongress: International Conference on Computer Architecture 35 Heilbronn; Online 2022.09.13-15

Wissenschaftliche Monographie

3D Interconnect Architectures for Heterogeneous Technologies - Modeling and Optimization

Bamberg, Lennart; Joseph, Jan Moritz; García-Ortiz, Alberto; Pionteck, Thilo

In: Cham: Imprint: Springer, 2022., 1st ed. 2022., 1 Online-Ressource(XXV, 395 p. 102 illus., 100 illus. in color.) - (Springer eBook Collection)

2021

Buchbeitrag

Ultra-low-latency video encoding on heterogenous hardware platforms

Koppehel, Martin; Pionteck, Thilo

In: 2020 International Conference on Field-Programmable Technology - Piscataway, NJ: IEEE . - 2021, S. 287

Buchbeitrag

An investigation of atomic synchronization for sort-based group-by aggregation on GPUs

Gurumurthy, Bala; Broneske, David; Schäler, Martin; Pionteck, Thilo; Saake, Gunter

In: 2021 IEEE 37th International Conference on Data Engineering workshops / IEEE International Conference on Data Engineering , 2021 - Piscataway, NJ : IEEE, S. 48-53

Buchbeitrag

StreamGrid - an AXI-stream-compliant overlay architecture

Blochwitz, Christopher; Philipp, León; Bereković, Mladen; Pionteck, Thilo

In: Symposium: 17th International Symposium, ARC 2021, Virtual Event, June 2930, 2021, Applied Reconfigurable Computing. Architectures, Tools, and Applications/ ARC - Cham: Springer International Publishing; Derrien, Steven . - 2021, S. 156-170 - ( Lecture notes in computer science; volume 12700)

Buchbeitrag

Architecture, dataflow and physical design implications of 3D-ICs for DNN-accelerators

Joseph, Jan Moritz; Samajdar, Ananda; Zhu, Lingjun; Leupers, Rainer; Lim, Sung Kyu; Pionteck, Thilo; Krishna, Tushar

In: Proceedings of the Twenty Second International Symposium on Quality Electronic Design/ ISQED - [Piscataway, NJ]: IEEE; Ghosh, Swaroop . - 2021, S. 60-66

Buchbeitrag

Bridging the frequency gap in heterogeneous 3D SoCs through technology-specific NoC router architectures

Jeong, Geonhwa; Chien, Ruei-Ting; Leupers, Rainer; Garía-Ortiz, Alberto; Krishna, Tushar; Pionteck, Thilo

In: Proceedings of the 26th Asia and South Pacific Design Automation Conference - New York,NY,United States: Association for Computing Machinery . - 2021, S. 197-203

Buchbeitrag

CuART - a CUDA-based, scalable Radix-Tree lookup and update engine

Koppehel, Martin; Groth, Tobias; Groppe, Sven; Pionteck, Thilo

In: Konferenz: 50th International Conference on Parallel Processing, ICPP 2021, Lemont, Il, USA, August 9 - 12, 2021, 50th International Conference on Parallel Processing - New York,NY,United States: Association for Computing Machinery . - 2021, insges. 10 S.

Buchbeitrag

Configurable pipelined datapath for data acquisition in interventional computed tomography

Passaretti, Daniele; Pionteck, Thilo

In: 29th IEEE International Symposium on Field-Programmable Custom Computing Machines/ IEEE International Symposium on Field-Programmable Custom Computing Machines - Piscataway, NJ: IEEE; Bobda, Christophe . - 2021, S. 257

Begutachteter Zeitschriftenartikel

In-depth analysis of OLAP query performance on heterogeneous hardware

Broneske, David; Drewes, Anna; Gurumurthy, Bala; Hajjar, Imad; Pionteck, Thilo; Saake, Gunter

In: Datenbank-Spektrum - Berlin : Springer, Bd. 21 (2021), S. 133-143

Begutachteter Zeitschriftenartikel

Ratatoskr - an open-source framework for in-depth power, performance, and area analysis and optimization in 3D NoCs

Joseph, Jan Moritz; Bamberg, Lennart; Hajjar, Imad; Perjikolaei, Behnam Razi; García-Ortiz, Alberto; Pionteck, Thilo

In: ACM transactions on modeling and computer simulation/ Association for Computing Machinery - New York, NY: ACM Press, Bd. 32 (2021), 1, insges. 21 S.

Herausgeberschaft

Architecture of Computing Systems - 34th International Conference, ARCS 2021, Virtual Event, June 78, 2021, Proceedings

Hochberger, Christian; Bauer, Lars; Pionteck, Thilo

In: Cham: Imprint: Springer, 2021., 1st ed. 2021., 1 Online-Ressource(XVIII, 229 p. 81 illus., 67 illus. in color.) - (Springer eBook Collection; Theoretical Computer Science and General Issues; 12800)

2020

Buchbeitrag

He..ro DB - a concept for parallel data processing on heterogeneous hardware

Müller, Michael; Leich, Thomas; Pionteck, Thilo; Saake, Gunter; Teubner, Jens; Spinczyk, Olaf

In: Architecture of Computing Systems ARCS 2020 - 33rd International Conference, Aachen, Germany, May 2528, 2020, Proceedings: 33rd International Conference, Aachen, Germany, May 2528, 2020, Proceedings - Cham: Springer International Publishing; Brinkmann, André. . - 2020, S. 82-96 - ( Lecture notes in computer science; 12155)

Buchbeitrag

Optimising operator sets for analytical database processing on FPGAs

Drewes, Anna; Joseph, Jan Moritz; Gurumurthy, Balasubramanian; Broneske, David; Saake, Gunter; Pionteck, Thilo

In: Applied Reconfigurable Computing. Architectures, Tools, and Applications: 16th International Symposium, ARC 2020, Toledo, Spain, April 13, 2020, Proceedings - Cham: Springer International Publishing . - 2020, S. 30-44 - (Lecture Notes in Computer Science; volume 12083)

Buchbeitrag

Ultra-low-latency video encoding on heterogenous hardware platforms

Koppehel, Martin; Pionteck, Thilo

In: 2020 International Conference on Field-Programmable Technology/ International Conference on Field-Programmable Technology - Piscataway, NJ: IEEE; Lin, Mingjie . - 2020, S. 287

Buchbeitrag

Parallelizing approximate search on adaptive radix trees

Groth, Tobias; Groppe, Sven; Koppehel, Martin; Pionteck, Thilo

In: CEUR workshop proceedings - Aachen, Germany: RWTH Aachen, Bd. 2646 (2020), S. 56-67

Buchbeitrag

Hardware/Software Co-Design of a control and data acquisition system for Computed Tomography

Passaretti, Daniele; Pionteck, Thilo

In: 2020 9th International Conference on Modern Circuits and Systems Technologies (MOCAST)/ MOCAST - [Piscataway, NJ]: IEEE . - 2020, insges. 4 S.

Begutachteter Zeitschriftenartikel

Application-specific SoC design using core mapping to 3D mesh NoCs with nonlinear area optimization and simulated annealing

Joseph, Jan Moritz; Ermel, Dominik; Bamberg, Lennart; García-Oritz, Alberto; Pionteck, Thilo

In: Technologies: open access journal - Basel: MDPI, Bd. 8 (2020), 1, insges. 10 S.

Herausgeberschaft

Architecture of Computing Systems – ARCS 2020 - 33rd International Conference, Aachen, Germany, May 25–28, 2020, Proceedings

Brinkmann, André.; Karl, Wolfgang; Lankes, Stefan; Tomforde, Sven; Pionteck, Thilo; Trinitis, Carsten

In: Cham: Imprint: Springer, 2020., 1 Online-Ressource(XII, 257 p. 112 illus., 62 illus. in color.) - (Theoretical Computer Science and General Issues; 12155; Springer eBook Collection), ISBN: 978-3-030-52794-5

Artikel in Kongressband

When vectorwise meets hyper, pipeline breakers become the moderator

Gurumurthy, Balasubramanian; Hajjar, Imad; Broneske, David; Pionteck, Thilo; Saake, Gunter

In: ADMS 2020: eleventh International Workshop on Accelerating Analytics and Data Management Systems Using Modern Processor and Storage Architectures : Monday, August 31, 2020 : in conjunction with VLDB 2020 - Tokyo . - 2020

2019

Abstract

Computed tomography hardware architectural model FPGA-based

Passaretti, Daniele; Pionteck, Thilo

In: 4th Image-Guided Interventions Conference: digitalization in medicine : November 4th-5th 2019, UMM, Mannheim - Mannheim, 2019 . - 2019

Buchbeitrag

System-level optimization of network-on-chips for heterogeneous 3D system-on-chips

Joseph, Jan Moritz; Ermel, Dominik; Bamberg, Lennart; García Oritz, Alberto; Pionteck, Thilo

In: Konferenz: IEEE 37th International Conference on Computer Design, ICCD, Abu Dhabi, United Arab Emirates, 17-20 November 2019, 2019 IEEE International Conference on Computer Design/ IEEE International Conference on Computer Design - Piscataway, NJ: IEEE . - 2019, S. 409-412

Buchbeitrag

Survey on FPGAs in medical radiology applications - challenges, architectures and programming models

Passaretti, Daniele; Joseph, Jan Moritz; Pionteck, Thilo

In: Konferenz: International Conference on Field-Programmable Technology, ICFPT, Tianjin, China, 09-13 December 2019, 2019 International Conference on Field-Programmable Technology/ ICFPT - Piscataway, NJ: IEEE . - 2019, S. 279-282

Buchbeitrag

Efficient inter-kernel communication for OpenCL database operators on FPGAs

Drewes, Anna; Joseph, Jan Moritz; Gurumurthy, Bala; Broneske, David; Saake, Gunter; Pionteck, Thilo

In: 2018 International Conference on Field-Programmable Technology (FPT) - [Piscataway, NJ]: IEEE, 2019[Konferenz: 2018 International Conference on Field-Programmable Technology, FPT, Naha, Okinawa, Japan, 10-14 December 2018]

Buchbeitrag

Hardware-accelerated index construction for semantic web

Blochwitz, Christopher; Wolff, Julian; Bereković, Mladen; Heinrich, Dennis; Groppe, Sven; Joseph, Jan Moritz; Pionteck, Thilo

In: Konferenz: 2018 International Conference on Field-Programmable Technology, FPT, Naha, Okinawa, Japan, 10-14 December 2018, 2018 International Conference on Field-Programmable Technology/ International Conference on Field-Programmable Technology - Piscataway, NJ: IEEE . - 2019

Buchbeitrag

Area optimization with non-linear models in core mapping for system-on-chips

Joseph, Jan Moritz; Ermel, Dominik; Drewes, Anna; Bamberg, Lennart; Garcia-Oritz, Alberto; Pionteck, Thilo

In: 2019 8th International Conference on Modern Circuits and Systems Technologies (MOCAST): May 13-15, 2019, Aristotle University Research Dissemination Center (KEDEA), Thessaloniki, Greece/ International Conference on Modern Circuits and Systems Technologies - [Piscataway, NJ]: IEEE . - 2019

Begutachteter Zeitschriftenartikel

Crosstalk optimization for through-silicon vias by exploiting temporal signal misalignment

Bamberg, Lennart; Joseph, Jan Moritz; Pionteck, Thilo; García Ortiz, Alberto

In: Integration, the VLSI journal - Amsterdam [u.a.]: Elsevier Science, 1983, Bd. 67.2019, S. 60-72

Begutachteter Zeitschriftenartikel

NoCs in heterogeneous 3D SoCs - co-design of routing strategies and microarchitectures

Joseph, Jan Moritz; Bamberg, Lennart; Ermel, Dominik; Perjikolaei, Behnam Razi; Drewes, Anna; García Ortiz, Alberto; Pionteck, Thilo

In: IEEE access/ Institute of Electrical and Electronics Engineers - New York, NY: IEEE, Bd. 7 (2019), S. 135145-135163

Begutachteter Zeitschriftenartikel

Simulation environment for link energy estimation in networks-on-chip with virtual channels

Joseph, Jan Moritz; Bamberg, Lennart; Hajjar, Imad; Schmidt, Robert; Pionteck, Thilo; García Ortiz, Alberto

In: Integration, the VLSI journal - Amsterdam [u.a.]: Elsevier Science, 1983 . - 2019[Online first]

Dissertation

Networks-on-Chip for heterogeneous 3D Systems-on-Chip

Joseph, Jan Moritz; Pionteck, Thilo

In: Magdeburg, 2019, xiv, 248 Seiten, Illustrationen, Diagramme, 30 cm[Literaturverzeichnis: Seite 235-246]

Herausgeberschaft

ARCS 2019 - 32nd GI/ITG International Conference on Architecture of Computing Systems : workshop proceedings : May 20-21, 2019, Technical University of Denmark, Copenhagen, Denmark

Trinitis, Carsten; Pionteck, Thilo

In: Berlin: VDE Verlag, 2019, 1 CD-ROM, 56 gKongress: GI/ITG International Conference on Architecture of Computing Systems 32 : Copenhagen$d2019.05.20-21

Herausgeberschaft

Architecture of Computing Systems ARCS 2019 - 32nd International Conference, Copenhagen, Denmark, May 2023, 2019, Proceedings

Schoeberl, Martin; Hochberger, Christian; Uhrig, Sascha; Brehm, Jürgen; Pionteck, Thilo

In: Cham: Springer, 2019, 1 Online-Ressource (XIX, 335 p. 212 illus., 88 illus. in color) - (Springer eBooks; Computer Science; Theoretical Computer Science and General Issues; 11479)

2018

Buchbeitrag

Continuous live-tracing as debugging approach on FPGAs

Blochwitz, Christopher; Klink, Raphael; Joseph, Jan Moritz; Pionteck, Thilo

In: 2017 International Conference on Reconfigurable Computing and FPGAs (ReConFig17): Cancun, Mexico, December 4-6, 2017 - Piscataway, NJ: IEEE, insges. 8 S., 2018[Kongress: International Conference on Reconfigurable Computing and FPGAs, ReConFig17, Cancun, Mexico, December 4-6, 2017]

Buchbeitrag

An FPGA-based prototyping framework for Networks-on-Chip

Drewes, Tobias; Joseph, Jan Moritz; Pionteck, Thilo

In: 2017 International Conference on Reconfigurable Computing and FPGAs (ReConFig17): Cancun, Mexico, December 4-6, 2017 - Piscataway, NJ: IEEE, insges. 7 S., 2018[Kongress: International Conference on Reconfigurable Computing and FPGAs, ReConFig17, Cancun, Mexico, December 4-6, 2017]

Buchbeitrag

Coding-aware link energy estimation for 2D and 3D networks-on-chip with virtual channels

Bamberg, Lennart; Joseph, Jan Moritz; Schmidt, Robert; Pionteck, Thilo; García Ortiz, Alberto

In: 2018 IEEE 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2018): 2-4 July 2018, Spain/ IEEE International Symposium on Power and Timing Modeling, Optimization and Simulation - Piscataway, NJ: IEEE, 2018; IEEE International Symposium on Power and Timing Modeling, Optimization and Simulation (28.:2018) . - 2018, S. 222-228[Symposium: IEEE 28th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2018, Platja d'Aro, Spain, 2-4 July 2018]

Buchbeitrag

Specification of simulation models for NoCs in heterogeneous 3D SoCs

Joseph, Jan Moritz; Bamberg, Lennart; Krell, Gerald; Hajjar, Imad; Garcia-Oritz, Alberto; Pionteck, Thilo

In: Proceedings of the 13th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC): July 9th-11th, 2018, Lille, France - Piscataway, NJ: IEEE, insges. 8 S.[Symposium: 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), Lille, France, July 9th-11th, 2018]

Buchbeitrag

Adaptive data processing in heterogeneous hardware systems

Gurumurthy, Balasubramanian; Drewes, Tobias; Broneske, David; Saake, Gunter; Pionteck, Thilo

In: CEUR workshop proceedings - Aachen: RWTH, Bd. 2126.2018, S. 10-15[Workshop: 30th GI-Workshop Grundlagen von Datenbanken, Wuppertal, Germany, May 22-25, 2018]

Buchbeitrag

Search & update optimization of a B + tree in a hardware aided semantic web database system

Heinrich, Dennis; Werner, Stefan; Blochwitz, Christopher; Pionteck, Thilo; Groppe, Sven

In: Proceedings of the 7th International Conference on Emerging Databases - Singapore: Springer, S. 172-182, 2018 - (Lecture Notes in Electrical Engineering; 461)[Konferenz: 7th International Conference on Emerging Databases (EDB 2017), Busan, Korea, 7 - 9 August, 2017]

Buchbeitrag

Design space exploration for a hardware-accelerated embedded real-time pose estimation using vivado HLS

Joseph, Jan Moritz; Mey, Morten; Ehlers, Kristian; Blochwitz, Christopher; Winker, Tobias; Pionteck, Thilo

In: 2017 International Conference on Reconfigurable Computing and FPGAs (ReConFig17): Cancun, Mexico, December 4-6, 2017 - Piscataway, NJ: IEEE, insges. 8 S., 2018[Kongress: International Conference on Reconfigurable Computing and FPGAs, ReConFig17, Cancun, Mexico, December 4-6, 2017]

Begutachteter Zeitschriftenartikel

Hardware-aided update acceleration in a hybrid Semantic Web database system

Heinrich, Dennis; Werner, Stefan; Blochwitz, Christopher; Pionteck, Thilo; Groppe, Sven

In: The journal of supercomputing: an international journal of high-performance computer design, analysis and use - Dordrecht [u.a.]: Springer Science + Business Media B.V, insges. 24 S., 2018

Begutachteter Zeitschriftenartikel

Cooking DBMS operations using granular primitives - an overview on a primitive-based RDBMS query evaluation

Gurumurthy, Balasubramanian; Broneske, David; Drewes, Tobias; Pionteck, Thilo; Saake, Gunter

In: Datenbank-Spektrum - Berlin: Springer, Bd. 18.2018, 3, S. 183-193

Begutachteter Zeitschriftenartikel

Integration of FPGAs in database management systems - challenges and opportunities

Becher, Andreas; B.G., Lekshmi; Broneske, David; Drewes, Tobias; Gurumurthy, Balasubramanian; Meyer-Wegener, Klaus; Pionteck, Thilo; Saake, Gunter; Teich, Jürgen; Wildermann, Stefan

In: Datenbank-Spektrum - Berlin: Springer, Bd. 18.2018, 3, S. 145-156

Herausgeberschaft

ARCS 2018 - 31th International Conference on Architecture of Computing Systems April, 9-12, 2018, Technische Universität Braunschweig, Braunschweig, Germany, Workshop Proceedings

Trinitis, Carsten; Pionteck, Thilo

In: Berlin: VDE Verlag, 2018, CD-ROM, 12 cmKongress: GI/ITG International Conference on Architecture of Computing Systems 31 (Braunschweig : 2018.04.09-12)

Herausgeberschaft

Architecture of Computing Systems – ARCS 2018 - 31st International Conference, Braunschweig, Germany, April 9–12, 2018, Proceedings

Berekovic, Mladen; Buchty, Rainer; Hamann, Heiko; Koch, Dirk; Pionteck, Thilo

In: Cham: Springer, 2018, Online-Ressource (XV, 326 p. 112 illus, online resource) - (Lecture Notes in Computer Science; 10793; Theoretical Computer Science and General Issues; 10793; SpringerLink; Bücher; Springer eBook Collection; Computer Science), ISBN: 978-3-319-77610-1

2017

Buchbeitrag

Design method for asymmetric 3D interconnect architectures with high level models

Joseph, Jan Moritz; Bamberg, Lennart; Wrieden, Sven; Ermel, Dominik; García-Oritz, Alberto; Pionteck, Thilo

In: 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2017) : July 12-14, 2017, Madrid, Spain : proceedings - [Piscataway, NJ] : IEEE, insges. 8 S. [Symposium: 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2017, Madrid, Spain, July 12-14 2017]

Buchbeitrag

An FPGA-based prototyping framework for networks-on-Chip

Drewes, Tobias; Joseph, Jan Moritz; Pionteck, Thilo

In: ReConFig'17 : 2017 International Conference on Reconfigurable Computing and FPGAs : December 4-6, Cancun, Mexico - Piscataway, NJ : IEEE [poster session A; Konferenz: 2017 International Conference on Reconfigurable Computing and FPGAs, ReConFig'17, Cancun, Mexico, December 4-6, 2017]

Buchbeitrag

Hardware-accelerated radix-tree based string sorting for big data applications

Blochwitz, Christopher; Wolff, Julian; Joseph, Jan Moritz; Werner, Stefan; Heinrich, Dennis; Groppe, Sven; Pionteck, Thilo

In: Architecture of Computing Systems - ARCS 2017 - 30th International Conference, Vienna, Austria, April 36, 2017, Proceedings - Cham: Springer, 2017 . - 2017, S. 47-58 - (Lecture Notes in Computer Science; 10172)[Konferenz: 30th International Conference on Architecture of Computing Systems, ARCS 2017, Vienna, Austria, April 3-6, 2017]

Buchbeitrag

Design space exploration for a hardware-accelerated embedded real-time pose estimation using vivado HLS

Joseph, Jan Moritz; Mey, Morten; Ehlers, Kristian; Blochwitz, Christopher; Winker, Tobias; Pionteck, Thilo

In: ReConFig'17 : 2017 International Conference on Reconfigurable Computing and FPGAs : December 4-6, Cancun, Mexico - Piscataway, NJ : IEEE [Poster session B; Konferenz: 2017 International Conference on Reconfigurable Computing and FPGAs, ReConFig'17, Cancun, Mexico, December 4-6, 2017]

Buchbeitrag

Contentious live-tracing as debugging approach on FPGAS

Blochwitz, Christopher; Klink, Raphael; Joseph, Jan Moritz; Pionteck, Thilo

In: ReConFig'17 : 2017 International Conference on Reconfigurable Computing and FPGAs : December 4-6, Cancun, Mexico - Piscataway, NJ : IEEE [General session; Konferenz: 2017 International Conference on Reconfigurable Computing and FPGAs, ReConFig'17, Cancun, Mexico, December 4-6, 2017]

Begutachteter Zeitschriftenartikel

Area and power savings via asymmetric organization of buffers in 3D-NoCs for heterogeneous 3D-SoCs$Jan Moritz Joseph, ChristopherBlochwitz, Alberto García-Ortiz, Thilo Piontecka

Joseph, Jan Moritz; Blochwitz, Christopher; García Ortiz, Alberto; Pionteck, Thilo

In: Microprocessors and microsystems - Amsterdam [u.a.]: Elsevier, 1979, Bd. 48.2017, S. 36-47

Begutachteter Zeitschriftenartikel

Semi-static operator graphs for accelerated query execution on FPGAs

Werner, Stefan; Heinrich, Dennis; Groppe, Sven; Pionteck, Thilo

In: Microprocessors and microsystems - Amsterdam [u.a.] : Elsevier, 2017

Herausgeberschaft

ARCS 2017 - 30th International Conference on Architecture of Computing Systems : workshop proceedings : April, 3-6, 2017, Vienna University of Technology, Vienna, Austria

Trinitis, Carsten; Pionteck, Thilo

In: Offenbach: VDE Verlag GmbH, [2017], 1 CD-ROM, ISBN: 3800743957 Kongress: ARCS 30 Wien 2017

Herausgeberschaft

Architecture of Computing Systems - ARCS 2017 - 30th International Conference, Vienna, Austria, April 3–6, 2017, Proceedings

Knoop, Jens; Karl, Wolfgang; Schulz, Martin; Inoue, Kōji; Pionteck, Thilo

In: Cham: Springer, 2017, Online-Ressource (XIII, 262 p. 100 illus, online resource) - (Lecture Notes in Computer Science; 10172; SpringerLink; Bücher; Springer eBook Collection; Computer Science), ISBN: 978-3-319-54999-6

2016

Buchbeitrag

A simulation environment for design space exploration for asymmetric 3D-Network-on-Chip

Joseph, Jan Moritz; Wrieden, Sven; Blochwitz, Christopher; García Ortiz, Alberto; Pionteck, Thilo

In: 2016 11th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoc): June 27-29, 2016, Tallinn, Estonia - [Piscataway, NJ]: IEEE[Kongress: 11th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoc), 27. - 29.June 2016, Tallinn, Estonia]

Buchbeitrag

Accelerated join evaluation in Semantic Web databases by using FPGAs

Werner, S.; Heinrich, D.; Stelzner, M.; Linnemann, V.; Pionteck, T.; Groppe, S.

In: Concurrency Computation, Vol. 28, 2016, Issue 7, S. 2031-2051, 10.1002/cpe.3502

Buchbeitrag

An architectural template for composing application specific datapaths at runtime

Backasch, R.; Hempel, G.; Blochwitz, C.; Werner, S.; Groppe, S.; Pionteck, T.

In: 2015 International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015, 2016, 10.1109/ReConFig.2015.7393300

Buchbeitrag

An optimized radix-tree for hardware-accelerated dictionary generation for semantic web databases

Blochwitz, C.; Joseph, J.M.; Backasch, R.; Pionteck, T.; Werner, S.; Heinrich, D.; Groppe, S.

In: 2015 International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015, 2016, 10.1109/ReConFig.2015.7393291

Buchbeitrag

Adaptive allocation of default router paths in Network-on-Chips for latency reduction

Joseph, Jan Moritz; Blochwitz, Christioher; Pionteck, Thilo

In: Proceedings of the 2016 International Conference on High Performance Computing & Simulation (HPCS 2016): July 18-22, 2016, Innsbruck, Austria - Piscataway, NJ: IEEE[Kongress: 2016 International Conference on High Performance Computing & Simulation (HPCS), Innsbruck, Austria, 18-22 July, 2016]

Buchbeitrag

Hardware-accelerated pose estimation for embedded systems using vivado HLS

Joseph, Jan Moritz; Winker, Tobias; Ehlers, Christian; Blochwitz, Christopher; Pionteck, Thilo

In: ReConFig: 2016 International Conference on Reconfigurable Computing and FPGAs : November 30 - December 2, Cancun, Mexico - Piscataway, NJ: IEEE[Kongress: 2016 International Conference on Reconfigurable Computing and FPGAs, ReConFig, Cancun, Mexico, November 30 - December 2, 2016]

Begutachteter Zeitschriftenartikel

Runtime adaptive hybrid query engine based on FPGAs

Werner, Stefan; Heinrich, Dennis; Groppe, Sven; Blochwitz, Christopher; Pionteck, Thilo

In: Open journal of databases: OJDB - Lübeck: RonPub UG, Bd. 3.2016, 1, S. 21-41

Herausgeberschaft

Architecture of Computing Systems – ARCS 2016

Hannig, Frank; Cardoso, João M. P.; Pionteck, Thilo; Fey, Dietmar; Schröder-Preikschat, Wolfgang; Teich, Jürgen

In: 2016

2015

Buchbeitrag

Area and power savings via buffer reorganization in asymmetric 3D-NoCs for heterogeneous 3D-SoCs

Joseph, J.M.; Blochwitz, C.; Pionteck, T.; Garcia-Ortiz, A.

In: 2015 Nordic Circuits and Systems Conference, NORCAS 2015: NORCHIP and International Symposium on System-on-Chip, SoC 2015, 2015, 10.1109/NORCHIP.2015.7364370

Buchbeitrag

Automated composition and execution of hardware-Accelerated operator graphs

Werner, S.S.; Heinrich, D.; Piper, J.; Groppe, S.; Backasch, R.; Blochwitz, C.; Pionteck, T.

In: 10th International Symposium on Reconfigurable and Communication-centric Systems-on-Chip, ReCoSoC 2015, 2015, 10.1109/ReCoSoC.2015.7238078

Buchbeitrag

Hybrid FPGA approach for a B+ tree in a Semantic Web database system

Heinrich, D.; Werner, S.; Stelzner, M.; Blochwitz, C.; Pionteck, T.; Groppe, S.T.

In: 10th International Symposium on Reconfigurable and Communication-centric Systems-on-Chip, ReCoSoC 2015, 2015, 10.1109/ReCoSoC.2015.7238093

Begutachteter Zeitschriftenartikel

RAW 2014: Random number generators on FPGAS

Raitza, M.; Vogt, M.; Hochberger, C.; Pionteck, T.

In: ACM Transactions on Reconfigurable Technology and Systems, Vol. 9, 2015, Issue 2, 10.1145/2807699

2014

Buchbeitrag

Parallel and pipelined filter operator for hardware-accelerated operator graphs in semantic web databases

Werner, S.; Heinrich, D.; Stelzner, M.; Groppe, S.; Backasch, R.; Pionteck, T.

In: Proceedings - 2014 IEEE International Conference on Computer and Information Technology, CIT 2014, 2014, S. 539-546, 10.1109/CIT.2014.162

Buchbeitrag

Influence of magnetic fields and X-radiation on ring oscillators in FPGAs

Raitza, M.; Vogt, M.; Hochberger, C.; Pionteck, T.

In: Proceedings of the International Parallel and Distributed Processing Symposium, IPDPS, 2014, S. 199-204, 10.1109/IPDPSW.2014.26

Buchbeitrag

A cycle-accurate Network-on-Chip simulator with support for abstract task graph modeling

Joseph, J.M.; Pionteck, T.

In: 2014 International Symposium on System-on-Chip, SoC 2014, 2014, 10.1109/ISSOC.2014.6972440

Buchbeitrag

Identifying homogenous reconfigurable regions in heterogeneous FPGAs for module relocation

Backasch, R.; Hempel, G.; Werner, S.; Groppe, S.; Pionteck, T.

In: 2014 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2014, 2014, 10.1109/ReConFig.2014.7032533

2013

Buchbeitrag

Hardware-accelerated join processing in large Semantic Web databases with FPGAs

Werner, S.; Groppe, S.; Linnemann, V.; Pionteck, T.

In: Proceedings of the 2013 International Conference on High Performance Computing and Simulation, HPCS 2013, 2013, S. 131-138, 10.1109/HPCSim.2013.6641403

Buchbeitrag

Prioritizing semi-static data streams in network-on-chips for runtime reconfigurable systems

Pionteck, T.; Osterloh, C.

In: Proceedings of the 2013 International Conference on High Performance Computing and Simulation, HPCS 2013, 2013, S. 229-232, 10.1109/HPCSim.2013.6641419

Buchbeitrag

Register allocation for high-level synthesis of hardware accelerators targeting FPGAs

Hempel, G.; Hoyer, J.; Pionteck, T.; Hochberger, C.

In: 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip, ReCoSoC 2013, 2013, 10.1109/ReCoSoC.2013.6581522

2012

Buchbeitrag

An approach for performance estimation of hybrid systems with FPGAs and GPUs as coprocessors

Hampel, V.; Pionteck, T.; Maehle, E.

In: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 7179 LNCS, 2012, S. 160-171, 10.1007/978-3-642-28293-5_14

2011

Buchbeitrag

Linking formal description and simulation of runtime reconfigurable systems

Pionteck, T.; Osterloh, C.; Albrecht, C.

In: Proceedings - 2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011, 2011, S. 158-163, 10.1109/ReConFig.2011.55

2010

Buchbeitrag

Optimizing runtime reconfiguration decisions

Pionteck, T.; Sammann, S.; Albrecht, C.

In: Proceedings - IEEE/IFIP International Conference on Embedded and Ubiquitous Computing, EUC 2010, 2010, S. 39-46, 10.1109/EUC.2010.16

Buchbeitrag

Latency reduction of selected data streams in network-on-chips for adaptive manycore systems

Pionteck, T.; Osterloh, C.; Albrecht, C.

In: 28th Norchip Conference, NORCHIP 2010, 2010, 10.1109/NORCHIP.2010.5669432

Buchbeitrag

A concept of a trust management architecture to increase the robustness of nano age devices

Pionteck, T.; Brockmann, W.

In: Proceedings of the International Conference on Dependable Systems and Networks, 2010, S. 142-147, 10.1109/DSNW.2010.5542604

Herausgeberschaft

DynaCORE-dynamically reconfigurable coprocessor for network processors

Albrecht, C.; Foag, J.; Koch, R.; Maehle, E.; Pionteck, T.

In: Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications, 2010, S. 335-354, 10.1007/978-90-481-3485-4_16

2009

Buchbeitrag

On the impact of buffer size on packet loss in adaptable network-on-chips for runtime reconfigurable system-on-chips

Albrecht, C.; Koch, R.; Pionteck, T.

In: 2009 NORCHIP, 2009, 10.1109/NORCHP.2009.5397798

2008

Buchbeitrag

On the design parameters of runtime reconfigurable systems

Pionteck, T.; Albrecht, C.; Koch, R.; Maehle, E.

In: Proceedings - 2008 International Conference on Field Programmable Logic and Applications, FPL, 2008, S. 683-686, 10.1109/FPL.2008.4630039

Buchbeitrag

SPP1148 booth: Network processors

Pionteck, T.; Koch, R.; Albrecht, C.; Maehle, E.; Meitinger, M.; Ohlendorf, R.; Wild, T.; Herkersdorf, A.

In: Proceedings - 2008 International Conference on Field Programmable Logic and Applications, FPL, 2008, S. 352, 10.1109/FPL.2008.4629960

Buchbeitrag

An application-oriented synthetic network traffic generator

Albrecht, C.; Osterloh, C.; Pionteck, T.; Koch, R.; Maehle, E.

In: Proceedings - 22nd European Conference on Modelling and Simulation, ECMS 2008, 2008, S. 299-305

Buchbeitrag

WCET determination tool for embedded systems software

Albrecht, C.; Koch, R.; Pionteck, T.; Maehle, E.; Werner, M.; Fuchsen, R.

In: SIMUTools 2008 - 1st International ICST Conference on Simulation Tools and Techniques for Communications, Networks and Systems, 2008, 10.4108/ICST.SIMUTOOLS2008.3044

Buchbeitrag

Performance analysis of bus-based interconnects for a run-time reconfigurable co-processor platform

Albrecht, C.; Roß, P.; Koch, R.; Pionteck, T.; Maehle, E.

In: Proceedings of the 16th Euromicro Conference on Parallel, Distributed and Network-Based Processing, PDP 2008, 2008, S. 200-205, 10.1109/PDP.2008.52

Buchbeitrag

Design and simulation of runtime reconfigurable systems

Pionteck, T.; Albrecht, C.; Koch, R.; Brix, T.; Maehle, E.

In: Proceedings - 2008 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, DDECS, 2008, S. 154-157, 10.1109/DDECS.2008.4538776

Begutachteter Zeitschriftenartikel

Adaptive communication architectures for runtime reconfigurable system-on-chips

Pionteck, T.; Albrecht, C.; Koch, R.; Maehle, E.

In: Parallel Processing Letters, Vol. 18, 2008, Issue 2, S. 275-289, 10.1142/S0129626408003387

2007

Buchbeitrag

Communication architectures for dynamically reconfigurable FPGA designs

Pionteck, T.; Albrecht, C.; Koch, R.; Maehle, E.; Hübner, M.; Becker, J.

In: Proceedings - 21st International Parallel and Distributed Processing Symposium, IPDPS 2007; Abstracts and CD-ROM, 2007, 10.1109/IPDPS.2007.370364

Buchbeitrag

On the design of a dynamically reconfigurable function-unit for error detection and correction

Pionteck, T.; Stiefmeier, T.; Staake, T.; Glesner, M.

In: IFIP International Federation for Information Processing, Vol. 240, 2007, S. 283-297, 10.1007/978-0-387-73661-7_18

Buchbeitrag

Teaching informatics students the secrets of hardware design

Pionteck, T.

In: Proceedings - MSE 2007: 2007 IEEE International Conference on Microelectronic Systems Education: Educating Systems Designers for the Global Economy and a Secure World, 2007, S. 31-32, 10.1109/MSE.2007.82

Buchbeitrag

A lightweight framework for runtime reconfigurable system prototyping

Koch, R.; Pionteck, T.; Albrecht, C.; Maehle, E.

In: Proceedings of the International Workshop on Rapid System Prototyping, 2007, S. 61-64, 10.1109/RSP.2007.7

Buchbeitrag

Modelling tile-based run-time reconfigurable systems using SystemC

Albrecht, C.; Pionteck, T.; Koch, R.; Maehle, E.

In: 21st European Conference on Modelling and Simulation: Simulations in United Europe, ECMS 2007, 2007, S. 509-514

2006

Buchbeitrag

Applying partial reconfiguration to networks-on-chips

Pionteck, T.; Koch, R.; Albrecht, C.

In: Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL, 2006, S. 155-160, 10.1109/FPL.2006.311208

Buchbeitrag

An adaptive system-on-chip for network applications

Koch, R.; Pionteck, T.; Albrecht, C.; Maehle, E.

In: 20th International Parallel and Distributed Processing Symposium, IPDPS 2006, Vol. 2006, 2006, 10.1109/IPDPS.2006.1639445

Buchbeitrag

A dynamically reconfigurable packet-switched network-on-chip

Pionteck, T.; Albrecht, C.; Koch, R.

In: Proceedings -Design, Automation and Test in Europe, DATE, Vol. 1, 2006

Begutachteter Zeitschriftenartikel

Exploring the capabilities of reconfigurable hardware for OFDM-based wlans

Pionteck, T.; Kabulepa, L.D.; Glesner, M.

In: IFIP International Federation for Information Processing, Vol. 200, 2006, S. 149-164, 10.1007/0-387-33403-3_10

2005

Buchbeitrag

Reconfigurable embedded systems: An application-oriented perspective on architectures and design techniques

Glesner, M.; Hinkelmann, H.; Hollstein, T.; Indrusiak, L.S.; Murgan, T.; Obeid, A.M.; Petrov, M.; Pionteck, T.; Zipf, P.

In: Lecture Notes in Computer Science, Vol. 3553, 2005, S. 12-21

2004

Buchbeitrag

Design of a reconfigurable AES encryption/decryption engine for mobile terminals

Pionteck, T.; Staake, T.; Stiefmeier, T.; Kabulepa, L.D.; Glesner, M.

In: Proceedings - IEEE International Symposium on Circuits and Systems, Vol. 2, 2004, S. II545-II548

Buchbeitrag

Reconfigurable platforms for ubiquitous computing

Glesner, M.; Hollstein, T.; Indrusiak, L.S.; Zipf, P.; Pionteck, T.; Petrov, M.; Zimmer, H.; Murgan, T.

In: 2004 Computing Frontiers Conference, 2004, S. 377-389

Buchbeitrag

A dynamically reconfigurable function-unit for error detection and correction in mobile terminals

Pionteck, T.; Stiefmeier, T.; Staake, T.R.; Glesner, M.

In: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 3203, 2004, S. 1090-1092

2003

Buchbeitrag

Hardware evaluation of low power communication mechanisms for transport-triggered architectures

Pionteck, T.; García, A.; Kabulepa, L.D.; Glesner, M.

In: Proceedings of the International Workshop on Rapid System Prototyping, Vol. 2003-January, 2003, S. 141-147, 10.1109/IWRSP.2003.1207041

Buchbeitrag

Reconfiguration requirements for high speed wireless communication systems

Pionteck, T.; Kabulepa, L.D.; Schlachta, C.; Glesner, M.

In: Proceedings - 2003 IEEE International Conference on Field-Programmable Technology, FPT 2003, 2003, S. 118-125, 10.1109/FPT.2003.1275739

Begutachteter Zeitschriftenartikel

On the Rapid Prototyping of Equalizers for OFDM Systems

Pionteck, T.; Kabulepa, L.D.; Glesner, M.

In: Design Automation for Embedded Systems, Vol. 8, 2003, Issue 4, S. 283-295, 10.1023/B:DAEM.0000013063.88613.e0

2002

Buchbeitrag

A framework for teaching (re)configurable architectures in student projects

Pionteck, T.; Zipf, P.; Kabulepa, L.D.; Glesner, M.

In: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 2438 LNCS, 2002, S. 444-451

Buchbeitrag

On the rapid prototyping of equalizers for OFDM systems

Pionteck, T.; Toender, N.; Kabulepa, L.D.; Glesner, M.; Kella, T.

In: Proceedings of the International Workshop on Rapid System Prototyping, Vol. 2002-January, 2002, S. 48-52, 10.1109/IWRSP.2002.1029737

2001

Buchbeitrag

On the numerical accuracy of cordic-based frequency offset compensation in burst oriented OFDM systems

Kabulepa, L.D.; Kella, T.; Pionteck, T.; Ludewig, R.; Becker, J.; Plechinger, J.; Glesner, M.

In: Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, Vol. 2, 2001, S. 1069-1072

Buchbeitrag

Efficient mapping of pre-synthesized IP-cores onto dynamically reconfigurable array architectures

Becker, J.; Liebau, N.; Pionteck, T.; Glesner, M.

In: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 2147, 2001, S. 584-589

Buchbeitrag

Design and implementation of a coarse-grained dynamically reconfigurable hardware architecture

Becker, J.; Pionteck, T.; Habermann, C.; Glesner, M.

In: Proceedings - IEEE Computer Society Workshop on VLSI, WVLSI 2001, 2001, S. 41-46, 10.1109/IWV.2001.923138

Herausgeberschaft

Effiziente IP-basierte abbildungsverfahren für dynamisch rekonfigurierbare array-architekturen

Becker, J.; Pionteck, T.; Glesner, M.

In: ITG-Fachbericht, 2001, Issue 164, S. 315

2000

Buchbeitrag

DReAM: A dynamically reconfigurable architecture for future mobile communication applications

Becker, J.; Pionteck, T.; Glesne, M.

In: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 1896, 2000, S. 312-321

Buchbeitrag

An application-tailored dynamically reconfigurable hardware architecture for digital baseband processing

Becker, J.; Pionteck, T.; Glesner, M.

In: Proceedings - 13th Symposium on Integrated Circuits and Systems Design, 2000, S. 341-346, 10.1109/SBCCI.2000.876052

Lehrveranstaltungen

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